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Transport triggered architecture

Код 3284153

  • ISBN: 978-5-5144-6543-9

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Аннотация к книге "Transport triggered architecture"

High Quality Content by WIKIPEDIA articles! In computer architecture, a transport triggered architecture (TTA) is a kind of CPU design in which programs directly control the internal transport buses of a processor. Computation happens as a side effect of data transports: writing data into a triggering port of a functional unit triggers the functional unit to start a computation. This is similar to what happens in a systolic array. Due to its modular structure, TTA is an ideal processor template for application-specific instruction-set processors (ASIP) with customized datapath but without the inflexibility and design cost of fixed function hardware accelerators.

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ISBN: 978-5-5144-6543-9

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